1. Field of the Invention
The present invention disclosed herein relates to memory systems and more particularly, to a memory system and method for transferring data between pluralities of memories.
2. Description of Related Art
FIG. 1 is a block diagram of a memory system 100. Referring to FIG. 1, the memory system 100 includes a controller 120, and memories 140 and 160. The memories 140 and 160 are NAND flash memories. The memories 140 and 160 are connected to the controller 120 by way of a common bus. Chip-enable pins CEb and ready/busy pin RBb of the memories 140 and 160 are independently connected to the controller 120.
FIG. 2 is a schematic illustrating a pattern of data transmission between memories 140 and 160 in the memory system 100. In the memory system 100, a procedure for transferring data from a source page 144 of the first memory 140 to a destination page 164 of the second memory 160 is as follows. Referring to FIG. 2, first, data of the source page 144 of the first memory 140 is transferred to a page buffer 146 ({circle around (1)}). Then, the data transferred to the page buffer 146 is transferred to a buffer 122 of the controller 120 ({circle around (2)}). Next, the data transferred to the buffer 122 of the controller 110 is transferred to a page buffer 166 of the second memory 160 ({circle around (3)}). Subsequently, the data transferred to the page buffer 166 is transferred to the destination page 164 of the second memory 160 ({circle around (4)}).
FIG. 3 is a timing diagram according to the data transmission pattern shown in FIG. 2. Referring to FIG. 3, the memory system 100 is operable with data transmission by reading page data from the first memory 140 and writing the read page data into the second memory 160. The controller 120 selects the memories 120 and 140, and transfers a read or write command for a selected one of the memories. Each of the memories 140 and 160 generates the ready/busy signal RBb0 or RBb1, for interrupting access from the controller 120, while conducting the read or write operation.
While a page size of the NAND flash memory is large, the memory system 100 needs to conduct a write operation after a read operation to accomplish data transmission between NAND flash memories. Therefore, a data transmission time becomes longer with the page size.